View MAX3346E_4243137.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-3172; Rev 0; 2/04
15kV ESD-Protected USB Transceiver in UCSP
General Description
The MAX3346E bidirectional transceiver converts logiclevel signals to USB signals, and USB signals to logiclevel signals. The MAX3346E includes the 1.5k USB pullup resistor internally, and supports both full-speed (12Mbps) and low-speed (1.5Mbps) USB operation. The device has built-in 15kV ESD protection circuitry to guard the USB I/O pins, D+ and D-. The MAX3346E operates with VL voltages as low as 1.65V, ensuring compatibility with low-voltage ASICs. The device features a logic-selectable suspend mode that lowers current draw to less than 40A. The MAX3346E has an enumerate function that allows devices to logically disconnect while plugged in. The MAX3346E is fully compliant with USB specification 1.1, and the full-speed and low-speed operation under USB specification 2.0. The MAX3346E is available in the miniature 4 x 4 chipscale package (UCSPTM), as well as the small 14-pin TSSOP, and is rated for the -40C to +85C extended temperature range.
Features
15kV ESD Protection on D+ and D Internal Linear Regulator Allows Direct Powering from the USB Cable Internal 1.5k Pullup Resistor for Low/Full-Speed Operation Supports Low-Speed and Full-Speed USB Communications Complies with USB Specification Revision 1.1 and 2.0 (Low Speed and Full Speed) Three-State Outputs Enumerate Input--Allows USB Connection through Software No Power-Supply Sequencing Required Operates with VL of 1.65V to 3.6V, Ensuring Compatibility with Low-Voltage ASICs Available in Miniature Chip-Scale Package
MAX3346E
Applications
Cell Phones PC Peripherals Data Cradles PDAs MP3 Players
PART MAX3346EEUD MAX3346EEBE-T
Ordering Information
TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 14 TSSOP 4 x 4 UCSP
UCSP is trademark of Maxim Integrated Products, Inc.
Pin Configurations
TOP VIEW
RCV 1 VP MODE 2 3 14 VL 13 VTRM 12 D+ D VP C 11 D10 GND 9 8 VCC SPEED A ENUM SPEED VCC GND B OE SUSP DVM MODE D+ RCV VL VTRM
BOTTOM VIEW
1
2
3
4
MAX3346E
VM 4 OE 5 ENUM 6 SUSP 7
MAX3346E
TSSOP
UCSP 1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.) Supply Voltage (VCC) ...............................................-0.3V to +6V Output of Internal Regulator (VTRM) ..........-0.3V to (VCC + 0.3V) Input Voltage (D+, D-) ..............................................-0.3V to +6V System Supply Voltage (VL) .....................................-0.3V to +6V RCV, SUSP, VM, VP, MODE, OE, SPEED, ENUM ....................................-0.3V to (VL + 0.3V) Short-Circuit Current (D+, D-) to VCC or GND (Note 1) ..........................................Continuous Maximum Continuous Current (all other pins) ..................15mA Note 1: External 23.7 resistors connected to D+ and D-.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Continuous Power Dissipation (TA = +70C) 4 x 4 UCSP (derate 7.4mW/C above +70C).....589mW [B16-2] 14-Pin TSSOP (derate 9.1mW/C above +70C) ..727mW [U14-1] Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Bump Temperature (soldering) Reflow............................+235C
ELECTRICAL CHARACTERISTICS
(VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to +3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25C.) (Note 2)
PARAMETER SYMBOL CONDITIONS Internal regulator MIN 3.0 1.65 4.0 IVCC IVL IVCC(IDLE) IVL(STATIC) IVCC(SUSP) IVCC(DIS) ID_(DIS) IVL(SHARING) Full-speed transmitting/receiving at 12Mbps, CL = 50pF on D+ and DFull-speed transmitting/receiving at 12Mbps Full-speed idle: VD+ > 2.7V, VD- < 0.3V SE0: VD+ < 0.3V, VD- < 0.3V Full-speed idle, SE0, or suspend mode SUSP = OE = high VL = GND or open VL = GND or open, VD_ = 0 or +5.5V VCC = GND or open, OE = low, SUSP = high 340 390 TYP 3.3 MAX 3.6 3.60 5.5 8 6 450 500 5 40 20 5 20 20 UNITS V V V mA mA A A A A A A A
SUPPLY INPUTS (VCC, VTRM, VL) Regulated Supply Voltage VVTRM VL Input Range VCC Input Range Operating VCC Supply Current Operating VL Supply Current Full-Speed Idle and SE0 Supply Current Static VL Supply Current Suspend Supply Current Disable-Mode Supply Current D+/D- Disable-Mode Load Current Sharing-Mode VL Supply Current D+/D- Sharing-Mode Load Current LINEAR REGULATOR External Capacitor COUT
ID_(SHARING) VCC = GND or open, VD_ = 0 or +5.5V
Compensation of linear regulator
1
F
2
_______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to +3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25C.) (Note 2)
PARAMETER ESD PROTECTION (D+, D-) Human Body Model IEC 1000-4-2 Air-Gap Discharge IEC 1000-4-2 Contact Discharge LOGIC-SIDE I/O Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current USB-SIDE I/O Output-Voltage Low Output-Voltage High Input Impedance Single-Ended Input-Voltage High Single-Ended Input-Voltage Low D+, D- Receiver Hysteresis Driver Output Impedance Internal Resistor Input Common-Mode Voltage Differential Input Sensitivity ROUT RPULLUP 4.6 1.410 0.8 200 1.5 VOLD VOHD ZIN VIH VIL 200 16.0 1.540 2.5 RL = 1.5k from D+ or D- to 3.6V RL = 15k from D+ and D- to GND VD_ = 0 or +3.6V, ENUM = 0, three-state driver 2.8 1 2.0 0.8 0.3 3.6 V V M V V mV k V mV VIH VIL VOH VOL VP, VM, SUSP, SPEED, OE, MODE, ENUM VP, VM, SUSP, SPEED, OE, MODE, ENUM ISOURCE = +2mA, RCV, VP, VM ISINK = -2mA, RCV, VP, VM VP, VM, SUSP, ENUM, OE, MODE = 0 or VL VL - 0.4 0.4 1 (2/3) x VL 0.4 V V V V A 15 10 8 kV kV kV SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX3346E
TIMING CHARACTERISTICS
(VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to +3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25C.) (Note 2)
PARAMETER OE to VP/VM Three-State Delay Disable Time OE to VP/VM Delay Enable Time D+/D- to RCV Propagation Delay D+/D- to RCV Propagation Delay SYMBOL CONDITIONS MIN TYP MAX UNITS
SPEED INDEPENDENT TIMING CHARACTERISTICS tPVZ tPZV tPLH tPHL Figures 1a and 4a Figures 1a and 4a CL = 25pF, Figures 4b and 5 CL = 25pF, Figures 4b and 5 20 25 18 18 ns ns ns ns
_______________________________________________________________________________________
3
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
TIMING CHARACTERISTICS (continued)
(VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to 3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25C.) (Note 2)
PARAMETER D+/D- to VP/VM Propagation Delay OE to Transmit Delay Enable Time OE to Driver Three-State Delay Disable Time VP/VM to D+/D- Propagation Delay (MODE = 1) VP to D+/D- Propagation Delay (MODE = 0) D+, D- Rise Time D+, D- Fall Time Rise- and Fall-Time Matching (Note 3) Output-Signal Crossover Voltage (Note 3) SYMBOL tPLH tPHL CONDITIONS CL = 25pF, Figures 4b and 5 CL = 25pF, Figures 4b and 5 MIN TYP MAX 18 18 UNITS ns
FULL-SPEED TIMING CHARACTERISTICS tPZD tPDZ tPLH tPHL tPHL0 tPLH0 tR tF tR/tF VCRS (Figures 1b, 4d) (Figures1b, 4d) (Figures 3, 4c) (Figures 3, 4c) CL = 50pF (Figures 2, 4c) CL = 50pF (Figures 2, 4c) CL = 50pF, 10% to 90% of |VOH - VOL| CL = 50pF, 90% to 10% of |VOH - VOL| CL = 50pF CL = 50pF 4 4 90 1.3 20 20 18 18 20 20 20 20 110 2.0 ns ns ns ns ns ns % V
LOW-SPEED TIMING CHARACTERISTICS VP/VM to D+/D- Propagation Delay (MODE = 1) VP to D+/D- Propagation Delay (MODE = 0) D+/D- Rise Time D+/D- Fall Time Rise- and Fall-Time Matching Output-Signal Crossover Voltage tPLH tPHL tPHL0 tPLH0 tR tF tR/tF VCRS Figures 3 and 4c, CL = 50pF to 600pF Figures 3 and 4c, CL = 50pF to 600pF Figures 2 and 4c, CL = 50pF to 600pF Figures 2 and 4c, CL = 50pF to 600pF CL = 50pF to 600pF CL = 50pF to 600pF CL = 50pF to 600pF CL = 50pF to 600pF 30 30 30 30 75 75 80 1.3 250 250 250 250 300 300 125 2.0 ns ns ns ns % V
Note 2: Parameters are 100% production tested at +25C, limits over temperature are guaranteed by design. Note 3: Guaranteed by design, not production tested.
4
_______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
Typical Operating Characteristics
(VCC = +5V, VL =+3.3V, TA = +25C, unless otherwise noted.)
SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. VL
MAX3346E toc01
SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. VCC
14 PROPAGATION DELAY (ns) 13 SKEW (ns) 12 11 10 9 8 7 TA = -40C TA = +25C TA = +85C
MAX3346E toc02
SKEW vs. VCC (MODE 0, FULL SPEED)
1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 4.00 4.25 4.50 TA = +25C TA = +85C TA = -40C
MAX3346E toc03
15 TA = +85C 14 PROPAGATION DELAY (ns) 13 12 11 10 9 8 7 1.5 1.8 2.1 2.4 2.7 3.0 3.3 TA = -40C TA = +25C
15
2.0
3.6
4.00
4.25
4.50
4.75 VCC (V)
5.00
5.25
5.50
4.75 VCC (V)
5.00
5.25
5.50
VL (V)
SKEW VS. VCC (MODE 0, LOW SPEED)
0.9 0.8 0.7 SKEW (ns) 0.6 0.5 0.4 0.3 0.2 0.1 0 4.00 4.25 4.50 4.75 VCC (V) 5.00 5.25 5.50 TA = -40C TA = +85C TA = +25C
MAX3346E toc04
OE, VP, VM TIMING
MAX3346E toc05
1.0
A 0 B 0 C 0 (FIGURE 4a) 200ns/div A: VP, 2V/div B: VM, 2V/div C: OE, 5V/div
OE, VP, VM TIMING
MAX3346E toc06
VTRM vs. VCC
MAX3346E toc07
3.5
A VTRM (V) 0 B 0 C 0 (FIGURE 4a) 200ns/div A: VP, 2V/div B: VM, 2V/div C: OE, 5V/div
3.4
3.3
3.2
3.1 IVTRM = 15mA 3.0 4.00 4.25 4.50 4.75 VCC (V) 5.00 5.25 5.50
_______________________________________________________________________________________
5
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
Typical Operating Characteristics (continued)
(VCC = +5V, VL = +3.3V, TA = +25C, unless otherwise noted.)
SUSPEND RESPONSE
MAX3346E toc08
RISE- AND FALL-TIME MATCHING (LOW SPEED)
MAX3346E toc09
RISE- AND FALL-TIME MATCHING (FULL SPEED)
MAX3346E toc10
f = 750kHz A 0
f = 6MHz
D+
D+
DB 0 100ns/div A: SUSP, 2V/div B: RCV, 2V/div 100ns/div 0
D0
20ns/div
Pin Description
PIN TSSOP 1 2 UCSP D2 D1 NAME RCV VP INPUT/ OUTPUT Output Input/ Output FUNCTION Receiver Output. Single-ended CMOS output. RCV responds to the differential input on D+ and D- (see Table 3). System-Side Data Input/Output. Drive OE high to make VP a receiver output. Drive OE low to make VP a driver input (see Table 3). Mode Control Input. Selects single-ended (mode zero) or differential (mode one) input for the system side when converting logic-level signals to USB-level signals. If MODE is forced high, mode one is selected. If MODE is forced low, mode zero is selected (see Table 3). System-Side Data Input/Output. Drive OE high to make VM a receiver output. Drive OE low to make VM a driver input (see Table 3). Output Enable. Drive OE high to enable the receiver. Drive OE low to enable the driver input. Enumerate Input. Drive ENUM low to disconnect the internal 1.5k resistor, and enumerate the USB. With ENUM high, the internal 1.5k resistor is connected to either D+ or D-, depending on the state of SPEED.
3
C2
MODE
Input
4
C1
VM OE
Input/ Output Input
5
B1
6
A1
ENUM
Input
6
_______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP
Pin Description (continued)
PIN TSSOP 7 UCSP B2 NAME INPUT/ OUTPUT Input FUNCTION Suspend Input. Drive SUSP low for normal operation. Force SUSP high for lowpower state. In low-power state RCV is low, D+/D- are high impedance if OE is floating, and VP/VM are active outputs. USB Transmission Speed Select Input. If SPEED is forced high, full speed (12Mbps) is selected and the internal 1.5k pullup resistor is connected to D+. If SPEED is forced low, low speed (1.5Mbps) is selected and the internal 1.5k pullup resistor is connected to D-. USB-Side Power-Supply Input. Connect VCC to the incoming USB power supply. Bypass VCC to GND with a 1F ceramic capacitor. Ground USB Differential Data Input/Output. Connect to the USB's D- signal through a 24.3 1% resistor. USB Differential Data Input/Output. Connect to the USB's D+ signal through a 24.3 1% resistor. Regulated Output Voltage. 3.3V output derived from the VCC input. Bypass VTRM to GND with a 1F (or more) low-ESR capacitor, such as ceramic or plastic film types. System-Side Power-Supply Input. Connect to the system's logic-level power supply, 1.65V to 3.6V. Bypass to GND with a 0.1F capacitor. Not populated. The solder sphere is omitted from these locations (see the Package Information).
MAX3346E
SUSP
8
A2
SPEED
Input
9 10 11 12
A3 A4 B4 C4
VCC GND DD+
Power Power Input/ Output Input/ Output Power
13
D4
VTRM
14 --
D3 B3, C3
VL --
Power --
Detailed Description
The MAX3346E is a bidirectional transceiver that converts single-ended or differential logic-level signals to differential USB signals, and converts differential USB signals to single-ended or differential logic-level signals. The MAX3346E includes an internal 1.5k pullup resistor that can be connected to either D+ or D- for full-speed or low-speed operation (see the Functional Diagram). The MAX3346E can be energized without concern about power-supply sequencing. Additionally, the USB I/O, D+ and D-, are ESD protected to 15kV. The MAX3346E can get its USB-side power, V CC ,
directly from the USB connection, and can operate with system-side power, VL, down to 1.65V and still meet the USB physical layer specifications. The MAX3346E supports both full-speed (12Mbps) and low-speed (1.5Mbps), USB specification 1.1 operation. The MAX3346E has an enumerate feature that works when power is on. Driving ENUM low disconnects the internal 1.5k pullup resistor from both D+ and D-, reenumerating the USB. This is useful if changes in communication protocol are required while power is applied, and while the USB cable is connected.
_______________________________________________________________________________________
7
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
Applications Information
Power-Supply Configurations
Normal Operating Mode Connect VL and VCC to system power supplies (Table 1). Connect VL to a +1.65V to +3.6V supply. Connect V CC to a +4.0V to +5.5V supply. Alternatively, the MAX3346E can derive power from a single Li+ battery. Connect the battery to V CC . VTRM remains above +3.0V for VCC as low as +3.1V. Additionally, the MAX3346E can derive power from a 3.3V 10% voltage regulator. Connect VCC and VTRM to an external +3.3V voltage regulator. Disable Mode Connect VCC to a system power supply and leave VL unconnected or connect to GND. D+ and D- enter a tristate mode and VCC consumes less than 20A of supply current. D+ and D- withstand external signals up to +5.5V in disable mode (Table 2). Sharing Mode Connect VL to a system power supply and leave VCC (or VCC and VVTRM) unconnected or connect to GND. D+ and D- enter a tri-state mode, allowing other circuitry to share the USB D+ and D- lines, and VL consumes less than 20A of supply current. D+ and D- withstand external signals up to +5.5V in sharing mode (Table 2).
Device Control OE
OE controls the direction of communication through the device. With OE low, the MAX3346E transfers data from the system side to the USB side. With OE high, the MAX3346E transfers data from the USB side to the system side. ENUM The MAX3346E allows software control of USB enumeration. USB specification 1.1 requires a 1.5k pullup resistor to D+ or D- to set the transmission speed (see the SPEED section). Enumerating the USB requires removing the 1.5k resistor from the circuit, and is accomplished with the MAX3346E by driving ENUM low. With ENUM high, the voltage at SPEED determines how the internal resistor is connected (see the Functional Diagram). MODE MODE is a control input that selects whether differential or single-ended logic signals are recognized by the system side of the MAX3346E (Table 3). If MODE is forced high, differential input is selected. With differential input selected, outputs D+ and D- follow the differential inputs at VP and VM. If VP and VM are both forced low, an SE0 condition is forced on the USB. Drive MODE and VM low for single-ended input mode. With single-ended input selected, the differential signal on D+ and D- is controlled by VP. If VM is high when MODE is low, D- and D+ are both low, forcing an SE0 condition.
Table 1. Power-Supply Configurations
VCC (V) +4.0 to +5.5 +3.1 to +4.5 +3.0 to +3.6 GND or floating +3.0 to +5.5 VTRM (V) +3.3 Output +3.3 Output +3.0 to +3.6 Input Output Output VL (V) +1.65 to +3.6 +1.65 to +3.6 +1.65 to +3.6 +1.65 to +3.6 GND or floating CONFIGURATION Normal mode Battery supply Voltage regulator supply Sharing mode Disable mode NOTES -- -- -- Table 2 Table 2
Table 2. Disable-Mode and Sharing-Mode Configurations
INPUTS/OUTPUTS VCC/VTRM VL D+ and DSPEED, SUSP, OE, ENUM DISABLE MODE * +5V input/+3.3V output * +3.3V input/+3.3V output * +3.7V input/+3.3V output Floating or connected to GND High impedance High impedance SHARING MODE Floating or connected to GND +1.65V to +3.6V input High impedance High impedance
8
_______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP
Timing Diagrams
VL OE 0V tPVZ tPZV VTRM VOH - 0.3V VP/VM VOL + 0.3V 0V DD+ VL/2 VL VPO 0V tPHLO tPLHO VL/2
MAX3346E
Figure 1a. Enable and Disable Timing, Receiver
Figure 2. Mode 0 Timing
VL OE 0V tPZD tPDZ VL/2
VL VL/2 0V tPHL1 VL VL/2 0V VOLD + 0.3V tPLH1 VTRM VL/2
VP
tPLH1
VOHD - 0.3V D+/D-
VM tPHL1 D+
Figure 1b. Enable and Disable Timing, Transmitter
SUSP SUSP, or suspend, is a control input. When SUSP is forced high the MAX3346E enters a low-power state. In this state, the quiescent supply current into VCC is less than 40A. In this mode, RCV is forced low, and D+ and D- are high-impedance inputs (Table 3d). In suspend mode, data can only be transmitted with full-speed slope control. SPEED SPEED is a control input that selects between low-speed (1.5Mbps) and full-speed (12Mbps) USB transmission. Internally, it selects whether the 1.5k pullup resistor is connected to D+ (full-speed) or D- (low-speed) (Functional Diagram). Force SPEED high to select full speed, or force SPEED low to select low speed. VTRM VTRM is the 3.3V output of the internal linear voltage regulator. The regulator is used to power the internal portions of the USB side of the MAX3346E. The VTRM
0V
D-
Figure 3. Mode 1 Timing
regulator's supply input is VCC. Connect a 1.0F (or greater) ceramic or plastic capacitor from VTRM to GND, as close to VTRM as possible. Do not use VTRM to provide power to external circuitry. D+ and DD+ and D- are the transceiver I/O connections, and are ESD protected to 15kV using the Human Body Model, making the MAX3346E ideal for applications where a robust transmitter is required. VCC Bypass VCC to GND with a 1F capacitor. Place the 1F capacitor as close as possible to the MAX3346E.
_______________________________________________________________________________________
9
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
MAX3346E
VP or VM 25pF + GND or VCC TEST POINT 200 VM or VP or RCV 25pF
MAX3346E
TEST POINT
(a) LOAD FOR ENABLE AND DISABLE TIME, VP/VM.
(b) LOAD FOR VP, VM AND RCV.
MAX3346E
3.3V D+ or D1.5k CL 23.7
TEST POINT
MAX3346E
23.7 D+ or D-
TEST POINT 200
15k
50pF
+ -
GND or VCC
(c) LOAD FOR D+/D-.
(d) LOAD FOR ENABLE AND DISABLE TIME, D+/D-.
Figure 4. Test Circuits
D+
3V
DtPHL RCV tPLH
0V
VL VL/2 0V tPHL tPLH VL VL/2 0V tPLH tPHL VL VL/2 0V D+/D- RISE/FALL TIMES 8ns, VL = 1.65V, 2.5V, 3.3V
VP
VM
Figure 5. D+/D- to RCV, VP, VM Propagation Delays 10 ______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP
Table 3a. Truth Table, Transmit (MODE = 0)
OE = 0 (TRANSMIT) INPUT VP 0 0 1 1 VM 0 1 0 1 D+ 0 0 1 0 OUTPUT D1 0 0 0 RCV 0 RCV* 1 X RESULT Logic 0 SE0 Logic 1 SE0
MAX3346E
*RCV denotes the signal level on output RCV just before SE0 state occurs. This level is stable during the SE0 period.
Table 3b. Truth Table, Transmit (MODE = 1)
OE = 0 (TRANSMIT) INPUT VP 0 0 1 1 VM 0 1 0 1 D+ 0 0 1 1 OUTPUT D0 1 0 1 RCV RCV* 0 1 X RESULT SE0 Logic 0 Logic 1 Undefined
*RCV denotes the signal level on output RCV just before SE0 state occurs. This level is stable during the SE0 period.
Table 3c. Truth Table, Receive
OE = 1 (RECEIVE) INPUT D+ 0 0 1 1 D0 1 0 1 VP 0 0 1 1 OUTPUT VM 0 1 0 1 RCV RCV* 0 1 X RESULT SE0 Logic 0 Logic 1 Undefined
*RCV denotes the signal level on output RCV just before SE0 state occurs. This level is stable during the SE0 period.
Table 3d. Function Select
SUSP 0 0 0 0 1 1 ENUMERATE 0 0 1 1 0 1 OE 0 1 0 1 0 or 1 0 or 1 D+/DDriving High-Z Driving High-Z High-Z High-Z RCV Active Active Active Active 0 0 VP/VM High-Z Active High-Z Active Active Active Normal driving Normal receiving, RPULLUP disconnected Normal driving Normal receiving, RPULLUP connected Suspend mode, RPULLUP disconnected Suspend mode, RPULLUP connected FUNCTION
______________________________________________________________________________________
11
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
External Components
External Resistors Two external resistors are required for USB connection, each of them from 23.7 1% to 27.4 1%, 1/2W (or greater). Place one resistor in series between D+ of the MAX3346E and D+ of the USB connector. Place the other resistor in series between D- of the MAX3346E and D- of the USB connector. The Typical Operating Circuit shows these connections. External Capacitors Four external capacitors are recommended for proper operation. Use a 0.1F ceramic for decoupling VL, a 1F ceramic capacitor for decoupling VCC, and a 1.0F (or greater) ceramic or plastic filter capacitor on VTRM. Return all capacitors to GND. Receiving Data from the USB Data received from the USB are output to VP/VM and RCV in either of two ways, differentially or single ended. To receive data from the USB, force OE high, and force SUSP low. Differential data arriving at D+/D- appears as differential logic signals at VP/VM, and as a singleended logic signal at RCV. If both D+ and D- are low, then VP and VM are low, signaling an SE0 condition on the bus; RCV retains the last state before SE0 (see Table 3). Transmitting Data to the USB The MAX3346E outputs data to the USB differentially on D+ and D-. The logic driving the signals may be either differential or single ended. For sending differential logic, force MODE high, force OE and SUSP low, and apply data to VP and VM. If sending single-ended logic, force MODE, SUSP, OE, and VM low, and apply data to VP. With VP low, D+ is low and D- high, resulting in a logic 0 state. With VP high, D+ is high and Dlow, resulting in a logic 1 state (see Table 3). ESD protection can be tested in various ways; the D+ and D- input/output pins are characterized for protection to the following limits: 1) 15kV using the Human Body Model. 2) 8kV using the Contact Discharge method specified in IEC 1000-4-2. 3) 10kV using the IEC 1000-4-2 Air-Gap method. ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. Human Body Model Figure 6a shows the Human Body Model, and Figure 6b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5k resistor.
RC 1M CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1500 DISCHARGE RESISTANCE DEVICE UNDER TEST
Cs 100pF
STORAGE CAPACITOR
Figure 6a. Human Body ESD Test Models
ESD protection
To protect the MAX3346E against ESD, D+ and D- have extra protection against static electricity to protect the device up to 15kV. The ESD structures withstand high ESD in all states; normal operation, suspend, and powered down. For the 15kV ESD structures to work correctly, a 1F or greater capacitor must be connected from VTRM to GND.
IP 100% 90% AMPERES 36.8% 10% 0 0 tRL TIME
Ir
PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
tDL CURRENT WAVEFORM
Figure 6b. Human Body Model Current Waveform
12
______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP
IEC 1000-4-2 The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX3346E helps to design equipment that meets Level 2 of IEC 1000-42, without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC 1000-4-2 is a higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD withstand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 7a shows the IEC 1000-4-2 model. The Air-Gap Discharge test involves approaching the device with a charged probe. The Contact Discharge method connects the probe to the device before the probe is energized. Machine Model The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protection during manufacturing, not just USB inputs and outputs. Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports.
MAX3346E
RC 50M to 100M CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE
RD 330 DISCHARGE RESISTANCE DEVICE UNDER TEST
Cs 150pF
STORAGE CAPACITOR
Figure 7a. IEC 1000-4-2 ESD Test Model
UCSP Applications Information
For the latest application details on UCSP construction, dimensions, tape carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile as well as the latest information on reliability testing results, go to the Maxim website at www.maxim-ic.com/ucsp for the Application Note, "UCSP--A Wafer-Level Chip-Scale Package."
13
___________________________________________________________________________________________________ 13 ______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
Typical Operating Circuit
1.0F CERAMIC 0.1F CERAMIC USB CABLE VCC VL VP VM RCV ENUM OE SUSP SPEED MODE GND 15k GND 15k D23.7 1% D+ D+ 23.7 1% DPC USB POWER
SYSTEM POWER
ASIC
MAX3346E
VTRM 1.0F CERAMIC
14
______________________________________________________________________________________
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
Functional Diagram
VCC
MAX3346E
VL 1.5k SPEED
LINEAR REGULATOR
VTRM
INTERNAL POWER
OE ENUM MODE DSUSP LEVEL SHIFTER AND CONTROL LOGIC D+
RCV
VP
VM GND
Chip Information
TRANSISTOR COUNT: 2162 PROCESS: BiCMOS
______________________________________________________________________________________
15
15kV ESD-Protected USB Transceiver in UCSP MAX3346E
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
16
______________________________________________________________________________________
TSSOP4.40mm.EPS
15kV ESD-Protected USB Transceiver in UCSP
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX3346E
PACKAGE OUTLINE, 4x4 UCSP 21-0101 H
1 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
16L,UCSP.EPS

▲Up To Search▲

Price & Availability of MAX3346E

	To Download MAX3346E Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .